CV | Ahmad Attiah A Alzahrani | Umm Al-Qura University

Social Networks

Qualifications

الدكتوراه

2015

‏هندسة الحاسب الآلي

جامعة سنترال فلوريدا | الولايات المتحدة الأمريكية

الماجستير

2009

‏الهندسة الكهربائية

جامعة أركنسا - فيتفيل | الولايات المتحدة الأمريكية

البكالوريوس

1422

‏الهندسة الكهربائية

جامعة ام القرى | المملكة العربية السعودية

Scientific Research

Leveraging Design Diversity to Counteract Process Variation: Theory, Method, and FPGA Toolchain to Increase Yield and Resilience In-situ

2019

مقال في مجلة | John Wiley & Sons Inc | IET Computers and Digital Techniques

Energy and Delay Tradeoffs of Soft-Error Masking for 16-nm FinFET Logic Paths: Survey and Impact of Process Variation in the Near-Threshold Region

2016

مقال في مجلة | IEEE | IEEE Transactions on Circuits and Systems II: Express Briefs

Area-energy tradeoffs of logic wear-leveling for BTI-induced aging

2016

ورقة مؤتمر | Association for Computing Machinery | Proceedings of the ACM International Conference on Computing Frontiers

Fast Online Diagnosis and Recovery of Reconfigurable Logic Fabrics using Design Disjunction

2016

مقال في مجلة | IEEE | IEEE Transactions on Computers

Hypergraph-Cover Diversity for Maximally-Resilient Reconfigurable Systems

2015

ورقة مؤتمر | IEEE | Proceedings of IEEE 12th International Conference on Embedded Software and Systems

Process Variation Immunity of Alternative 16nm HK/MG-based FPGA Logic Blocks

2016

ورقة مؤتمر | IEEE | Proceedings of IEEE 58th International Midwest Symposium on Circuits and Systems

Reactive Rejuvenation of CMOS Logic Paths using Self-Activating Voltage Domains

2015

ورقة مؤتمر | IEEE | Proceedings of IEEE International Symposium on Circuits and Systems

Non-adaptive sparse recovery and fault evasion using disjunct design configurations

2015

ورقة مؤتمر | Association for Computing Machinery | Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays

Extending modular redundancy to NTV: Costs and limits of resiliency at reduced supply voltage

2015

ورقة مؤتمر | IEEE Press | Proceedings of the Workshop on Near Threshold Computing (WNTC'14)

Self-healing reconfigurable logic using autonomous group testing

2013

مقال في مجلة | Elsevier | Microprocessors and Microsystems

Glitch-free design for multi-threshold CMOS NCL circuits

2009

ورقة مؤتمر

Multi-threshold asynchronous circuit design for ultra-low power

2008

مقال في مجلة | Elsevier | Journal of Low Power Electronics

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CV

Qualifications

الدكتوراه

الماجستير

البكالوريوس

Scientific Research

Leveraging Design Diversity to Counteract Process Variation: Theory, Method, and FPGA Toolchain to Increase Yield and Resilience In-situ

Energy and Delay Tradeoffs of Soft-Error Masking for 16-nm FinFET Logic Paths: Survey and Impact of Process Variation in the Near-Threshold Region

Area-energy tradeoffs of logic wear-leveling for BTI-induced aging

Fast Online Diagnosis and Recovery of Reconfigurable Logic Fabrics using Design Disjunction

Hypergraph-Cover Diversity for Maximally-Resilient Reconfigurable Systems

Process Variation Immunity of Alternative 16nm HK/MG-based FPGA Logic Blocks

Reactive Rejuvenation of CMOS Logic Paths using Self-Activating Voltage Domains

Non-adaptive sparse recovery and fault evasion using disjunct design configurations

Extending modular redundancy to NTV: Costs and limits of resiliency at reduced supply voltage

Self-healing reconfigurable logic using autonomous group testing

Glitch-free design for multi-threshold CMOS NCL circuits

Multi-threshold asynchronous circuit design for ultra-low power

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